Before entering on the details about the architectural features present on the Nehalem CPUs, let’s make a summary of the base elements that are common to the many different versions: server, desktop and notebook. It’s worth noticing how the new architecture engineering process used by Intel aims at obtaining CPUs that can be used in all three sectors, by simply slightly changing architecture and CPU characteristics to better adapt to each of the sectors.
To make things clear, we can mention a few examples: for the notebook CPUs, there’s a lower energy consumptions, while for the server solutions, there could be bigger cache numbers. In general, analyzing the technical characteristics from the Nehalem CPUs when compared to the Core 2 family, it’s clear how the developing team aimedf at implementing features that would bring the best performance benefits on a server level, with an approach that is somewhat similar to wht AMD has done in the past with their first K8 family CPUs, Opteron and Athlon 64.
These are the base elements on the Nehalem family CPU’s.
- Native Quad Core architecture: Intel has abandoned the Multi Chip Package approach, choosing instead what is defined as “monolithic design” for the Nehalem CPU’s. The four cores, similar to the Phenom solutions from AMD, are integrated in the same silicon block instead of pairing two dual-core dice in the same package.
- DDR3 Memory controller integrated on the processor: it’s a new feature for the Intel processors, the integrated memory controller has been on the market for a while now with the AMD CPus since the K8 family, with the first Opteron CPU presented on April 2003.
- Integrated on-die L3 Cache in all processors, up to 8MB; and also, the size of the L2 cache, specific to each core, was noticeably reduced compared to what has been done in the previous Core 2 processors. In future versions, the Nehalem processors will feature differen L3 cache versions, according to the market sector where it belongs;
- Return of the Simultaneous Multi-Threading technology, better known with the market name “Hyper-Threading”, thanks to which the Operational System can recognize the processor as featuring a double number of logical cores than what’s physically integrated. This technology was introduced by Intel with some Pentium 4 models, but it wasn’t implemented in the Core 2 Duo and Core 2 Quad solutions;
- A new set of SSE 4.2 instructions, which are extensions of SSE4 instructions introduced for the first time with the Core 2 CPUs based on Penryn cores;
- QPI (Quick Path Interconnect) technology debut: it comes to replace the front side bus on the connection between Processor, memory modules and in some CPU models, also chipset. For the first Core i7 family models, based on LGA 1366 socket, the connection between the processor and chipset will be done through a QPI link.
The first Nehalem processor versions with quad core architecture, the Core i7 family solutions, will integrate 731 million transistors, built using a 45nm fabrication process. The following evolution of Nehalem processors will feature the same fabrication process and will have a modular architecture that was implemented on the Nehalem project while in its design stages.
These processors can, in fact, be easily modified in order to implement a different number of cores, or integrate different types of features internally, in comparison to what had been presented in the first versions before the launch.
Two examples can make this flexibility more clear: the first is the Nehalem-EX CPUs, solutions that feature eight physical cores to be used specifically in server systems, which will be launched sometime this year, and that have been first announced back in the IDF Fall 2008. The second is the integration in future Nehalem versions aimed for a low-entry market, of a GPU: with this product, Intel aims at presenting its own alternative to AMD’s Fusion Family CPU’s, which feature both CPU and GPU components.